Customizing virtual networks with partial FPGA reconfiguration
نویسندگان
چکیده
منابع مشابه
Partial Reconfiguration using FPGA – A Review
This paper proposes a review on Partial reconfiguration using Field Programmable Gate Array (FPGA). By downloading configuration bit files Partial Dynamic Reconfiguration (PDR) dynamically modifies the hardware portion of the device. Both FPGA and reconfigurable are used to speed up the performance of various applications. This makes the FPGA to be used in new dimension with an advantage of mor...
متن کاملEvaluating Partial Reconfiguration for Embedded FPGA Applications
Recent advances in Xilinx’s FPGA hardware and commercial software design tools, spurred in large part by the DOD’s Joint Tactical Radio System initiative, offer the possibility of incorporating dynamic partial reconfiguration (PR) into highperformance, embedded systems outside of academic research laboratories. PR can provide the flexibility and run-time reconfigurability that no pure hardware ...
متن کاملImproving FPGA resilience through Partial Dynamic Reconfiguration
This paper explores advances in reconfiguration properties of SRAM-based FPGAs, namely Partial Dynamic Reconfiguration, to improve the resilience of critical systems that take advantage of this technology. Commercial of-the-shelf stateof-the-art FPGA devices use SRAM cells for the configuration memory, which allow an increase in both performance and capacity. The fast access times and unlimited...
متن کاملComplexity and Performance Tradeoffs with FPGA Partial Reconfiguration Interfaces
Two different interfaces, namely the JTAG and SelectMAP interfaces, have been proposed for controlling and managing partial reconfiguration of SRAM-based Field Programmable Gate Arrays (FGPAs). Each of these interfaces provides distinct advantages in terms of area overhead and reconfiguration latency. In this paper, two corresponding sets of Application Programming Interfaces (APIs) are develop...
متن کاملString Matching on Multicontext FPGA using Dynamic Partial Reconfiguration
If logic be optimized for each problem instance, FPGAs do better than ASICs. CAD tools to generate problem instance dependent logic and time required configuring the FPGAs. In this paper, a novel approach for mapping and reconfiguration proposed that uses dynamic partial reconfiguration of FPGAs to do speed-up over existing approaches. Main idea is to design and map problem instance dependent l...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
ژورنال
عنوان ژورنال: ACM SIGCOMM Computer Communication Review
سال: 2011
ISSN: 0146-4833
DOI: 10.1145/1925861.1925882